Project 01 — Embedded Systems & Telemetry

Bare-Metal Wireless Telemetry Gateway

Completed

This project is a bare-metal wireless telemetry system built on STM32 microcontrollers. The edge node samples soil moisture and temperature over I2C, packages the payload, and transmits telemetry over a sub-GHz LoRa RF link to a central gateway hub, which streams real-time diagnostic logs to a workstation terminal via UART.

Complete STM32 LoRa wireless telemetry node and hub gateway system on test bench

FIG 1.0 — System Overview: Dual STM32 node configuration sampling soil telemetry over I2C and routing sub-GHz payloads over 915MHz LoRa RF to gateway UART log.

Phase 1: Sensor Interfacing & Driver Engineering

Sensor data acquisition is handled through an Adafruit Seesaw coprocessor over I2C on the primary edge node. Developing bare-metal C drivers required extracting 32-bit big-endian register values, handling bitwise byte order reconstruction, and scaling raw capacitive measurements into standard physical units.

Close-up of STM32 sensor edge node wired to capacitive soil sensor over I2C lines

FIG 1.1 — Edge Sensor Node: I2C wiring between the primary STM32 node and the capacitive sensor coprocessor, including pull-up resistor verification and logic probing.

Phase 2: RF Communication & Payload Routing

To extend communications far past short-range limitations, raw telemetry buffers are serialized and passed over high-speed SPI to a 915MHz LoRa transceiver. The receiving central gateway hub captures the sub-GHz payload, unpacks the data string, and streams live diagnostic logs directly over UART to the host workstation console at 115200 Baud.

Central hub gateway setup with STM32 board and LoRa transceiver receiver module

FIG 1.2 — Central Hub Gateway: Receiving node running bare-metal LoRa receiver firmware and UART serial logging setup.

FIG 1.3 — Live Telemetry Stream: Console log updating in real time, demonstrating dynamic capacitance jumps as physical contact with the sensor blade alters the payload on each LoRa pulse.

Phase 3: Hardware Bring-Up & Diagnostics

Hardware testing exposed critical edge cases under real-world bus conditions, including persistent I2C state lockups (`0xFFFF`) caused by uncleared open-drain slave registers and inadequate ADC conversion windows. Resolving these required introducing software reset sequences, optimizing bus timing parameters, and enforcing 20ms delays between write commands and read executions.

Skills Utilized

Embedded Systems (STM32 / C) Bare-Metal Firmware I2C / SPI Protocols Sub-GHz LoRa RF UART / USART Diagnostics I2C Bus Recovery Logic Analyzer Debugging Systems Architecture
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